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《开源图形处理器 MIAOW/Nyuzi 》(Open Source GPGPU MIAOW/Nyuzi )[压缩包]

  • 状态: 精华资源
  • 摘要:
    发行时间2015年09月07日
    语言英文
  • 时间: 2015/09/17 19:08:42 发布 | 2016/09/04 22:58:17 更新
  • 分类: 软件  编程开发 

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中文名开源图形处理器 MIAOW/Nyuzi
英文名Open Source GPGPU MIAOW/Nyuzi
资源格式压缩包
发行时间2015年09月07日
地区美国
语言英文
简介

IPB Image
开源硬件已经在CPU上得到了很好的实现,而现在,威斯康辛-麦迪逊大学的垂直研发组又宣布了世界上第一款开源的GPGPU——“MIAOW”。
这个名字代表“Many-core Integrated Accelerator Of the Waterdeep”,是基于AMD Southern Islands Radeon HD 6000系列显卡开源指令集架构的电阻-晶体管逻辑实现。
领导这一研究的计算机学家Karu Sankaralingham指出,MIAOW的任务是延续摩尔定律的发展,而开源硬件代表着新的未来。他相信,再过5-10年,大家就会非常依赖开源硬件,就像现在对待开源软件那样。
不过现在,MIAOW还是一个纯粹的学术研究项目,是否或者何时投入商业化不是当前考虑的问题。
尽管如此,Karu Sankaralingham认为这个项目最大的意义就在于,他证明一个智慧的团队就可以打造出能与高端商业产品竞争的硬件,为完全不依赖于已有商业产品去创建全新设计奠定了基础。

引用
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Vinay edited this page on 9 Apr · 43 revisions
Pages 8
Contact info

miaowgpu@cs.wisc.edu miaowgpu@googlegroups.com
Clone this wiki locally


https://github.com/VerticalResearchGroup/miaow.wiki.git
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Background
MIAOW (pronounced "me-ow") [Many-core Integrated Accelerator Of Waterdeep/Wisconsin] is an open source GPU created by the Vertical Research Group at the University of Wisconsin-Madison led by Professor Karu Sankaralingam. Based off of the publicly released Southern Islands ISA by AMD, MIAOW implements a compute unit suitable for performing architecture analysis and experimentation with GPGPU workloads. In addition to the Verilog HDL composing the compute unit, MIAOW also includes a suite of unit tests and benchmarks for regression testing.

A primary motivator for MIAOW's creation is the belief that software simulators of hardware such as CPUs and GPUs often miss many subtle aspects that can skew the performance, power, and other quantitative results that they produce. As an actual implementation of a GPU's logic, the Vertical Research Group believes that MIAOW can be a useful tool in producing not only more accurate quantitative results when benchmarking GPGPU workloads but also provide context for the architectural complexities of actually implementing newly proposed algorithms and designs that are intended to improve performance or other desired characteristics.

It must be emphasized that MIAOW represents a GPU's compute unit. It does not possess the auxiliary logic required to produce actual graphical output nor does it have logic to connect it to a specific memory interface or system bus. These extensions can be developed and we would welcome outside contributors for such efforts, but as MIAOW was created as a research tool their presence was not an absolute necessity in running benchmarks and experiments.

MIAOW is licensed under the 3-clause BSD license
MIAOW is being released in phases as we complete the necessary preparation and packaging. Be sure to check this section to see what has been made available and what we hope to make available in the near future.

Available

RTL implementation of MIAOW compute unit
Testbench for verification
Benchmarks (instruction and data traces) that are known to run on MIAOW (derived from AMD APP SDK)
FPGA bootstrapping framework
Future

Synthesis scripts for area and power analysis
Verilog for hardware dispatcher for controlling multiple CUs
Patch for multi2sim simulator to generate reference instruction traces
Case Studies Documentation
Workload development.

https://github.com/VerticalResearchGroup/miaow





引用
Nyuzi Processor

Nyuzi is an experimental multicore GPGPU processor. It supports vector floating point, hardware multithreading, and cache coherence. The SystemVerilog-based hardware implementation is synthesizable and runs on FPGA. This project also includes an LLVM-based C++ toolchain, tests, and other tools. It is useful for microarchitecture experimentation, performance modeling, and parallel software development.

Documentation: https://github.com/jbush001/NyuziProcessor/wiki
Mailing list: https://groups.google.com/forum/#!forum/nyuzi-processor-dev
License: Apache 2.0
Blog: http://latchup.blogspot.com/

Background

GPUs have proven useful for applications with a lot of inherent parallelism like image processing and machine learning. However, GPUs have a highly constrained programming model that lacks flexibility. This project is a hybrid architecture that combines GPU architectural concepts like wide SIMD and hardware multithreading with a general purpose instruction set. The hardware implementation is focused more on computation than graphics, lacking fixed function graphics hardware. It is capable of operating as a coprocessor or a standalone processor.

This has been synthesized using the Nangate 45nm cell library. Estimates per core: area 1.84 mm2, power 329 mW, maximum frequency 671 Mhz.

https://github.com/jbush001/NyuziProcessor/



显卡驱动:http://www.mesa3d.org

网盘分流:http://pan.baidu.com/s/1gdxwwgV

本资源基于BSD开源协议发行。

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vwing1 2015/09/20 22:11:55 补充
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vwing1 2015/09/22 20:35:29 补充
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