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《电子设计套件》(Xilinx.ISE.Design.Suite)v13.2.MULTIPLATFORM[光盘镜像]

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  • 摘要:
    发行时间2011年
    制作发行Xilinx
    语言英文
  • 时间: 2011/08/16 22:23:08 发布 | 2011/08/17 07:02:53 更新
  • 分类: 软件  行业软件 

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中文名电子设计套件
英文名Xilinx.ISE.Design.Suite
资源格式光盘镜像
版本v13.2.MULTIPLATFORM
发行时间2011年
制作发行Xilinx
语言英文
简介

IPB Image

IPB Image

语言:英文
网址:http://www.xilinx.com/tools/designtools.htm
类别:电子设计套件



(from:china.xilinx)
Xilinx ISE Design Suite 设计套件是面向 Virtex -6 和 Spartan -6 FPGA 系列并针对生产力精心优化的工具套件,在降低功耗与成本方面取得了突破性进展。作为业界唯一一款特定领域的设计套件,赛灵思最新版本的发布, 是这一行业屡获殊荣的软件不断发展和演进的又一重要一步,它将进一步提高设计生产力和系统性能,使逻辑、嵌入式、数字信号处理 (DSP) 和系统设计人员能够更轻松地推出更复杂的创新型可编程电子产品,从而加速产品上市进程并提升产品质量。

ISE DESIGN SUITE 的主要优势

针对 VIRTEX -6 和 SPARTAN -6 FPGA:
● 利用自动时钟门控技术将动态功耗降低30%之多
● 利用第四代部分重配置设计流程降低系统成本
● PlanAhead - 面向逻辑设计人员的新款 RTL 到比特流设计流程
● 利用 AXI4 接口实现即插即用式 FPGA 设计

ISE Design Suite 13.2 可以使所有 7 系列 FPGA 产品的设计性能平均提高 7%。
● 现在可以为最低功耗、最低成本的 Artix -7 FPGA 和 Virtex -7 XT 系列产品提供初始设计支持。
● 通过内核生成器 (Core Generator),16 个新型和已改进的即插即用 IP 核可提供 AXI 互连,并改进尺寸和性能。
● PlanAhead 提供了简化的设计和分析,其中包括对 Virtex-7 和 Kintex -7 FPGA 的部分重配置支持
● 帮助 Base System Builder 新手缩短了 Embedded Edition 的开发时间,从而加快了尺寸或性能优化的设计的开发,其中包括对双MicroBlaze AXI 嵌入式 系统的支持


2011 年 7 月 7 日,中国北京——全球可编程平台领导厂商赛灵思公司(Xilinx,Inc. (NASDAQ:XLNX))今天宣布推出最新版 ISE 13.2 设计套件,为28nm 7系列产品,包括将于近期面世的Virtex-7 VX485T提供支持。同时,最新版本的ISE设计套件将采用堆迭硅片互联技术构建的业界最高密度的 Virtex -7 2000T 器件的设计性能提高了 25%。最新版 ISE 软件还增强了PlanAhead 设计分析工具的功能,不仅为 Virtex-7 和 Kintex-7 提供部分重配置功能支持,而且其前端到后端综合项目管理环境提高了 Spartan -6 FPGA、Virtex-6 FPGA 以及所有三个 7 系列产品的设计效率,包括为低成本的 Artix-7 系列提供初期支持。


Xilinx introduced the ISE Design Suite software to enable breakthrough optimizations for power and cost with greater design productivity. For the first time, ISE design tools deliver 'intelligent' clock-gating technology that reduces dynamic power consumption by as much as 30 percent. The new suite also provides advances in timing-driven design reservation, AMBA 4 AXI4-complaint IP support for plug-and-play design, and an intuitive design flow with fourth-generation partial reconfiguration capabilities that lowers system cost for a broad range of high performance applications.

With full production support for all Xilinx Virtex-6 and Spartan-6 FPGA families, the ISE release continues its evolution as the industry's only domain-specific design suite with interoperable design flows and tool configurations for logic, digital signal processing (DSP), embedded processing, and system-level design. In addition, Xilinx incorporated a number of software infrastructure and methodology enhancements that improve run time, streamline system integration, and expand IP interoperability across its latest generation device families and Targeted Design Platforms.

Intelligent Automation for Power Optimization

ISE Design Suite introduces the FPGA industry's first intelligent clock-gating technology with fully automated analysis and fine-grain (logic slice) optimization capabilities specifically developed to reduce the number of transitions, a primary contributing factor of dynamic power dissipation in digital designs. The technology works by analyzing designs using a series of unique algorithms to detect sequential elements...

OS: Windows, Linux 32/64bit


代码
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█▒▒▒▒░░░▒▒█▌▒▌                  (c) Xilinx Inc.                   ▐▒▐█▒▒░░░▒▒▒▒█
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█░▌                           Type ..... : FPGA                              ▐░█
█░▌                           Date ..... : 08/2011                           ▐░█
█░▌                           Size ..... : 59x100MB                          ▐░█
█░▌                           OS ....... : Windows, Linux 32/64bit           ▐░█
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    Xilinx introduced the ISE Design Suite software to enable
    breakthrough optimizations for power and cost with greater design
    productivity. For the first time, ISE design tools deliver 'intelligent'
    clock–gating technology that reduces dynamic power consumption by as
    much as 30 percent. The new suite also provides advances in
    timing–driven design preservation, AMBA 4 AXI4–complaint IP support for
    plug–and–play design, and an intuitive design flow with
    fourth–generation partial reconfiguration capabilities that lowers
    system cost for a broad range of high performance applications.

    With full production support for all Xilinx Virtex–6 and Spartan–6
    FPGA families, the ISE release continues its evolution as the
    industry's only domain–specific design suite with interoperable design
    flows and tool configurations for logic, digital signal processing
    (DSP), embedded processing, and system–level design. In addition, Xilinx
    incorporated a number of software infrastructure and methodology
    enhancements that improve run time, streamline system integration, and
    expand IP interoperability across its latest generation device families
    and Targeted Design Platforms.

    Intelligent Automation for Power Optimization

    ISE Design Suite introduces the FPGA industry's first intelligent
    clock–gating technology with fully automated analysis and fine–grain
    (logic slice) optimization capabilities specifically developed to reduce
    the number of transitions, a primary contributing factor of dynamic
    power dissipation in digital designs. The technology works by analyzing
    designs using a series of unique algorithms to detect sequential
    elements...

    http://www.xilinx.com/tools/designtools.htm

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